;***********************************
; MCGenjin Standards and Practices *
;***********************************
 Like most mappers, such as the MBCx series for Nintendo's
GameBoy, a variety of MCGenjin configurations exist. Thus,
some attempt must be made to keep documentation and 
differentiation amongst all of them.
 Observing the following standards may be considered what is
"Good behavior" when using an MCGenjin-enabled card.

;***************************************
; Requirements for an MCGenjin Program *
;***************************************
 From the end-user perspective, a program using an MCGenjin
mapper must observe the following rules-
	*The game or application must operate properly in both
		the TurboGrafx-16 and PC-Engine without
		any additional hardware requirements.

	*The devices connected to the MCGenjin chipselect lines
		must not draw excessively large amounts of power.
		No stepper motors, robot arms, stoves, etc.
		Low power devices are suggested in order to
		compensate for the Turbo Express.

 From a programmer/designer perspective, the following 
must be observed-
	*All MCGenjin-enabled cards must include a valid
		header as detailed below.

	*If slower-grade CPLDs are used for MCGenjin,
		changing the upper 256KB ROM bank while
		executing from it is not recommended.

	*In the case of slow ROMs used with MCGenjin, their 
		CE and OE should be enabled either at all
		times or using a20 from the cardslot to 
		prevent delay from relying on the mapper's
		ROM enable line.

;********************
; Hardware Gotcha's *
;********************
 Some details about MCGenjin's operation may be overlooked while
quickly skimming through its documentation. They are listed again
here, and it is quite advisable to keep them in mind.

	*The 256KB banked area defaults to zero on power up
		(same as the 256KB fixed area). This also
		means you can view bank 0 in this area at any
		time to make object code/data access simpler.

	*While the mapper can switch the order of the ROM 
		dataline reads, writes are unaltered. This means 
		that any writes to the mapper (such as bank changes)
		need to be reversed in software when running under a
		"swapped" region. Additionally, if you're using save
		memory (such as the FRAM on the 4MB Plus devcard) or
		anything other than SRAM (where the order wouldn't matter)
		on the user chipselects, the reads and writes to
		these are not swapped either. So in the case of having
		game saves on FRAM, you'd need to have a flag containing
		the last region used, and then twiddle the save game
		data appropriately.

	*The two user chipselects really are just two active-low lines
		triggered when any accesses occur in the two upper
		256KB areas. If you have a device which will work with
		an active-low chipselect, it can be connected and used.

;*************************
; Standard Header Format *
;*************************
 The 16-Byte header starts at address $1FD0 in the card
and thus is available starting at $FFD0 upon console
reset. It is in the following format:

	$FFD0-$FFD7 : ASCII String containing "MCGENJIN"
	$FFD8 : MCGenjin Chip Revision.
		$0- First Revision, 8MB ROM-Cap, two user chipselects
	$FFD9 : Number of 256KB pages in the game ROM
		$0- No ROM
		$1- 256KB of ROM
		...
		$20- 8MB of ROM
	$FFDA : Native ROM Region
		$0- US/EU
		$1- JP
	$FFDB : User Chipselect 0 Device Type
		-See list below
	$FFDC : User Chipselect 1 Device Type
		-See list below
	$FFDD-$FFDF : Unused/Future Expansion
		-Set to $0

 For example, the MCGenjin 4MB Plus development card 
would have the following header:
.orga $ffd0
MCGenjin_Flag:	.db "MCGENJIN"
MCGenjin_Rev:	.db 0
MCGenjin_Pages:	.db $10
MCGenjin_NReg:	.db 0
MCGenjin_UCS0:	.db $20
MCGenjin_UCS1:	.db $14,0,0,0

;*******************************
; User Chipselect Device Types *
;*******************************
 The following table represents which devices may be
connected to one of the user chipselect lines on the
MCGenjin enabled card, and their corresponding
value in the Device Type field in the MCGenjin header.

Value	Device
-----	------
$00	Nothing Connected
...
$10	8KB SRAM
$11	16KB SRAM
$12	32KB SRAM
$13	64KB SRAM
$14	128KB SRAM
$15	256KB SRAM
...
$20	8KB FRAM (Nonvolatile)
$21	16KB FRAM (Nonvolatile)
$22	32KB FRAM (Nonvolatile)
$23	64KB FRAM (Nonvolatile)
$24	128KB FRAM (Nonvolatile)
$25	256KB FRAM (Nonvolatile)