;****************************************************************
;			PCE Initialization			*
;****************************************************************
.orga $ff00
Secret_BootMsg:	.db "Was auch Immer!"
.orga $ff0f
;****************************************************************
; PCE_Reset:							*
;	Boot up the PCE from an unswapped startup vector.	*
;****************************************************************
.section "PCE_Reset" force
PCE_Reset:
	sei
	cld
	LDA #0
	TAX
	TAY
	DEX
	TXS
.ends
.orga $ff17
; Then fall into the initialization code below
;****************************************************************
; PCE_Initialize:						*
;	Place the hardware in a known state, and then start	*
; execution of the game code. If Y=0 we came from an unswapped	*
; reset vector, otherwise if Y=1 we're operating in a region	*
; requring MCGenjin to swap the data lines.			*
;****************************************************************
.section "PCE_Initialize" force
PCE_Initialize:
	LDA #PCE_PAGE_HW
	TAM #PCE_MPR0
	LDA #PCE_PAGE_WRAM
	TAM #PCE_MPR1
_ClearZP
	STZ $0,X
	DEX
	bne _ClearZP
	STY $0				; Clear ZeroPage, Set Region (Must be Zp0)

	LDY #0
	LDA #$21
	STA GLO_PointerHi
	TXA
_ClearRAM
	STA (GLO_PointerHi),Y
	INY
	bne _ClearRAM
	LDX GLO_PointerHi
	INX
	STX GLO_PointerHi
	CPX #$40
	bne _ClearRAM			; Clear RAM

	STA PCE_TIMER_EN		; Shut Off Timer
	LDA #(PCE_IRQ2 | PCE_IRQ1 | PCE_IRQTIMER)
	STA PCE_IRQ_EN			; Kill all IRQ Hardware
	STA PCE_IRQTIMER		; Ack Timer IRQ

	LDY #11
_InitVDC
	LDA VDC_IAddr,Y
	STA VDC_REG
	LDA VDC_IDataLo,Y
	STA VDC_DATALO
	LDA VDC_IDataHi,Y
	STA VDC_DATAHI
	DEY
	bpl _InitVDC			; Initialize VDC

	LDA #4
	STA VCE_CONT			; 5MHz Color Clock, Smoothing
	STZ PCE_IRQ_EN			; IRQ Hardware Back On
	cli				; IRQs Back On
	CSH				; Zoom! Boing!
	jmp GameLoop			; Let's Play


VDC_IAddr	.db VDC_REG_CR,VDC_REG_RCR,VDC_REG_BXR,VDC_REG_BYR
		.db VDC_REG_MWR,VDC_REG_HSR,VDC_REG_HDR,VDC_REG_VPR
		.db VDC_REG_VDW,VDC_REG_VCR,VDC_REG_DCR,VDC_REG_SATB
VDC_IDataLo	.db $CC,$00,$00,$00	; BG/SPR on... RCR, VBL IRQs on (But RCR is out of range now)
		.db $14,$02,$1F,$02
		.db $D0,$0C,$00,$00
VDC_IDataHi	.db $00,$00,$00,$00
		.db $00,$02,$03,$1C
		.db $00,$00,$00,$7F	; Screen Size is 256x208
.ends



;****************************************************************
; MCGenjin Header						*
;****************************************************************
.orga $ffd0
MCGenjin_Flag:	.db "MCGENJIN"		; Example header for MCGenjin 4MB Plus:
MCGenjin_Rev:	.db 0			; Chip Revision 0
MCGenjin_Pages:	.db $10			; 4MB ROM
MCGenjin_NReg:	.db 0			; US-Region
MCGenjin_UCS0:	.db $20			; 8KB FRAM on User CS0
MCGenjin_UCS1:	.db $14,0,0,0		; 128KB SRAM on User CS1
.orga $ffe0
;****************************************************************
; PCE_ResetSwappedFinish:					*
;	The second half of the swapped reset operations.	*
;****************************************************************
.section "PCE_ResetSwappedFinish" force
PCE_ResetSwappedFinish:
	.db %10010101			; $A9,$00 LDA #0
	.db %01010101			; $AA TAX
	.db %00010101			; $A8 TAY
	.db %01010011			; $CA DEX
	.db %01011001			; $9A TXS
	.db %00010011			; $C8 INY
	.db %01110001,%01111111,$FF	; $8E,$FE,$FF STX $FFFE, Set MCGenjin Region
	jmp PCE_Initialize		; We're back to normal D-Orders!
.ends
.orga $fff0
;****************************************************************
; PCE_ResetSwapped:						*
;	Boot up the PCE from a swapped startup vector.		*
;****************************************************************
.section "PCE_ResetSwapped" force
PCE_ResetSwapped:
	.db %00011110			; $78 sei
	.db %00011011			; $D8 cld
	.db %00110010,%00000111,$FF	; $4C,$E0,$FF jmp PCE_ResetSwappedFinish
.ends
;****************************************************************
; PCE_DummyIRQ:							*
;	Just a Dummy IRQ.					*
;****************************************************************
.section "PCE_DummyIRQ" force
PCE_DummyIRQ:
	rti
.ends